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【科研论文】郑月龙教授团队在ABS3星期刊《IEEE Transactions on Engineering Management》发表研究论文

2026年03月25日
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【论文信息】

Zheng, Y., Chen, Y., Hao, C., & Li, M. Innovation Incentives under Technology Blockade: Strategic Game Insights from the Semiconductor Industry.IEEE Transactions on Engineering Management, 2026, 73:1841-1854.

【作者信息】

第一作者:郑月龙,博士、教授、博士生导师,研究方向:技术创新管理、博弈论及运用

第二作者:陈玉玲,硕士研究生,研究方向:技术创新管理

【论文摘要】

Semiconductor industry has become the core domain of technological competition among countries nowadays. Suppliers with high-end chip technology, a key generic technology in the semiconductor industry, can significantly disrupt downstream product manufacturers and reshape the competitive dynamics by imposing a technology blockade. This paper focuses on high-end chip market, and builds a game model within a vertical supply chain structure to analyze how technology blockade affects the technological catch-up incentives for local chip suppliers. Our analysis reveals that before technology blockade, the monetary externality directs initial benefits to downstream manufacturers, diminishing high-end chip suppliers' rent extraction capacity. Local chip suppliers ' technology advancement reduces high-end chip suppliers' rent extraction capacity. This incentivizes high-end chip suppliers to talent foreclosure, and raises the cost of government support. The low-to-mid-end market plays an important role in accumulating innovation resource. After technology blockade, the chip supply chain is bifurcated into a high-end and a local mid-to-low-end chip supply chain. Government attention allocation intensity negatively moderates innovation policies intensity and, together with the low-to-mid-end market, alleviates the policies pressure from multiple dimensions. When the roles of high-end chip talents exceed a certain threshold, even if innovation policies are withdrawn, local chip suppliers can also be self-sufficient. As local chip supplier's technology catch-up, a new game situation gradually emerges in high-end market, characterized by the coexistence of the local and the existing high-end chip supply chain. The core findings are robust to the relaxed key assumptions, which substantiates the research rigour of this paper.



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